The blog says, "simple things like swapping HC series logic for AHCT series logic", which suggests that they aren't using TTL at all; the 74HC series and the 74AHCT series are both CMOS, not TTL. I haven't built a CPU from discrete logic like this, but I would also use CMOS rather than TTL. CMOS gives you infinite fanout, less ground bounce, symmetric drive strength, lower power, less sensitive to power supply tolerances. And it's much easier to get nowadays, and comes in small, convenient surface mount packages. The drawbacks are that with CMOS you need to tie unused inputs to a power rail rather than leaving them floating, and it's easier to blow it up with ESD.

I also wouldn't use a TTL-compatible family like the 74AHCT family, because another advantage of CMOS is that you have better noise margins, and the TTL-compatible families sacrifice that in order to gain compatibility with a logic family you aren't using because it's been obsolete for 40 years.

If you do want to do this, maybe start with RTL simulation, then an FPGA, then maybe CPLDs, before pulling the trigger on a fully discrete logic design. That way, you aren't debugging your assembler, your RTL, your timing, and your signal integrity problems at the same time. That way it's more like a term project than your life's work.

Relevant YT Playlist:

https://www.youtube.com/playlist?list=PLqTn11YkMSMxu0p4yKBcY...

[dead]